Programmable capacitor arrays can be used for tuning the response of an electrical circuit by varying the capacitance value of the capacitor to correspondingly produce different behaviors. In many applications, the set value may need to be tightly controlled to meet system requirements and optimize overall performance. In general, however, although such capacitors are commonly built using a range of processes, all processes exhibit variations due to factors such as rates, chemistries, temperatures, and timing. As a result, substantially all programmable capacitors as built have a range of values (e.g., for maximum capacitance value, minimum capacitance value, capacitance step between set values). This range may be acceptable for some applications, but when a more precise response is required, it is desirable that variation in the capacitance values be minimized.
To address these issues, attempts have been made to reduce the variation in the manufacturing process, but raising performance standards generally requires either exerting more precise control over the production process or discarding components that fail to meet the higher standards. Both of these approaches increase the cost of producing the components. Alternatively, the capacitors can be designed to reduce the sensitivity of the device capacitance on the process variation, but doing so is not possible in all device configuration and/or applications. As a result, it would be desirable for the variation in the performance of devices to be reduced without dramatically increasing manufacturing costs or requiring component designs to be constrained to only those configurations that are less sensitive to process variability.